Serial Number
98577259
Owner
Baya Systems, Inc.Attorney
Neil A. SalyardsFirst Use Date
Jun 23, 2024
Filing Date
May 30, 2024
WEAVERPRO Trademark
Serial Number: 98577259
Trademark Classes
Owner Contact Info
5201 Great America Parkway, Suite 100
Santa Clara, CA 95054
Entity Type: 03
Legal Representation
Correspondence Address
Neil A. Salyards Procopio, Cory, Hargreaves & Savitch LLP
525 B Street, Suite 2200
San Diego, CA 92101
United States
Trademark Details
Filing Date
May 30, 2024
Registration Date
Not Registered
First Use Anywhere
June 23, 2024
First Use in Commerce
June 23, 2024
Published for Opposition
April 15, 2025
Goods & Services
Downloadable computer software used as a development tool for use in the design of integrated circuits, namely, software for interconnect design and topology optimization for design of Network on a Chip (NOC) and System on a Chip (SOC) and software for the design of coherent memory subsystems of Network on a Chip (NOC) and System on a Chip (SOC), and chiplet devices; Design libraries, namely, downloadable electronic data files for use in integrated circuit and semiconductor design, namely, data files for interconnect design and topology optimization for design of NOC, SOC devices and data files for the design of coherent memory subsystems of NOC, SOC and chiplet devices; Micronetworks for use in the design of integrated circuits, namely, micronetworks for interconnect design and topology optimization for design of NOC and SOC devices and micronetworks for the design of coherent memory subsystems of NOC, SOC and chiplet devices; integrated circuit cores in the nature of system-level protocol cores and software drivers for use in automotive electronics, consumer electronics, communication devices, and computers; Downloadable software application design tools for use in design of integrated circuits, namely, software application design tools for interconnect design and topology optimization for design of NOC and SOC devices and system-level protocol cores and device drivers for the design of coherent memory subsystems of NOC, SOC and chiplet devices
