COLLECTIVELY DISTINCT
DEAD

Serial Number

98604682

Owner

Enfabrica Corporation

Attorney

Jessica L. Rothstein

Filing Date

Jun 17, 2024

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COLLECTIVELY DISTINCT Trademark

Serial Number: 98604682

COLLECTIVELY DISTINCT is a trademark filed by Enfabrica Corporation on June 17, 2024. The trademark is classified under Class 9 (Computers & Electronics), Class 42 (Computer & Scientific). The application is currently no longer active.

Owner Contact Info

Enfabrica Corporation (2 trademarks)

295 N. Bernardo Ave.
Mountain View, CA 94043

Entity Type: 03

Trademark Details

Filing Date

June 17, 2024

Registration Date

Not Registered

Published for Opposition

June 10, 2025

Goods & Services

Technological research in the field of computer and networking hardware systems; Research and development of new products for others; Research in the field of telecommunications technology; Research in the field of artificial intelligence technology; Design of telecommunications equipment and parts; Integrated circuit design; Research in the field of semiconductor processing technology; Semiconductor encapsulation design; Semiconductor design; Design of microchips; Computer programming; Design of computer software; Updating of computer software; Consultancy in the design and development of computer hardware; Maintenance of computer software; Installation of computer software; Computer software consultancy; Computer technology consultancy; Development of chip design software; Information technology consultancy relating to computer network design; Cloud computing featuring software for use in data center servers and networking equipment, for use in AI training, inference and Retrieval-Augmented Generation applications.

Semiconductor devices, namely, application-specific integrated circuits (ASICS) and application-specific standard products (ASSPS) manufactured using semiconductor fabrication process technologies; semiconductor chips; semiconductors; computer hardware; microprocessor modules; microprocessor subsystems comprised of one or more microprocessors, central processing units (CPUs), CPU cores, and downloadable software for operating the foregoing; computer hardware subsystems comprised of microprocessor subsystems; computer subsystems comprised of computers; chipsets; integrated circuits; graphics processor units; accelerated processors; microprocessor communication fabric, namely, data communication interconnect architecture responsible for collecting data, and command control interconnect architecture responsible for data sensor telemetry; data fabric, namely, computer hardware and downloadable software that supports storage, processing, analysis and management of disparate data; system on a chip (SOC) architecture for use with CPUs and GPUs, namely, SOC architecture that connects die-to-die, chip-to-chip, and socket-to-socket, used across different microprocessors to enable increased computing performance; network-on-a-chip, namely, technology that provides interfaces across microprocessor CPU and GPU cores, memory, hubs and data fabric to enable microprocessor communications and increase computing performance and efficiency; microprocessors used for microprocessor communication memory and electronic sensors; graphics processor subsystem, namely, microprocessor subsystems comprised of one or more microprocessors, graphics processing units (GPUs), GPU cores, and downloadable software for operating the foregoing; computer networking devices, namely, network interface controllers and network interface cards; data processing units, namely, data processing equipment; computer hardware for input/output (I/O) processing and control; telecommunications equipment, namely, ethernet switches and routers, and peripheral component interconnect express (PCIe) switches and bridges; compute express link (CXL) switches and bridges; semiconductor memory subsystems, namely, memory storage subsystems, and computer hardware and downloadable software for supporting, controlling and operating semiconductor memory subsystems; memory circuit designs, namely, integrated circuit memory and memory controller layouts recorded on computer media; storage area networking (SAN) systems; computer network-attached storage (NAS) hardware; computer blade servers; accelerated computing servers, machine learning servers, and deep learning servers with associated system downloadable software; Downloadable cloud-computing software for deploying and managing networking devices that connect CPUs, GPUs, AI Accelerators and CXL Memory end points in cloud and enterprise AI infrastructures.

Filing History

ABANDONMENT NOTICE E-MAILED - NO USE STATEMENT FILED
May 4, 2026 MAB6
ABANDONMENT - NO USE STATEMENT FILED
May 4, 2026 ABN6
NOA E-MAILED - SOU REQUIRED FROM APPLICANT
Sep 30, 2025 NOAM
OFFICIAL GAZETTE PUBLICATION CONFIRMATION E-MAILED
Jun 10, 2025 NPUB
PUBLISHED FOR OPPOSITION
Jun 10, 2025 PUBO
NOTIFICATION OF NOTICE OF PUBLICATION E-MAILED
Jun 4, 2025 NONP
APPROVED FOR PUB - PRINCIPAL REGISTER
May 8, 2025 CNSA
TEAS/EMAIL CORRESPONDENCE ENTERED
Apr 8, 2025 TEME
CORRESPONDENCE RECEIVED IN LAW OFFICE
Apr 8, 2025 CRFA
TEAS RESPONSE TO OFFICE ACTION RECEIVED
Apr 8, 2025 TROA
NOTIFICATION OF NON-FINAL ACTION E-MAILED
Jan 16, 2025 GNRN
NON-FINAL ACTION E-MAILED
Jan 16, 2025 GNRT
NON-FINAL ACTION WRITTEN
Jan 16, 2025 CNRT
ASSIGNED TO EXAMINER
Dec 19, 2024 DOCK
NEW APPLICATION OFFICE SUPPLIED DATA ENTERED
Jun 17, 2024 NWOS
NEW APPLICATION ENTERED
Jun 17, 2024 NWAP